POD135 – 1.35 V PSEUDO OPEN DRAIN I/O
standard by JEDEC Solid State Technology Association, 03/01/2018
JEDEC JESD79-3-3
Addendum No. 1 to 3D Stacked SDRAM
Amendment by JEDEC Solid State Technology Association, 12/01/2013
JEDEC JESD8-19
POD18 – 1.8 V Pseudo Open Drain I/O
standard by JEDEC Solid State Technology Association, 12/01/2006
JEDEC JESD73-4
STANDARD FOR DESCRIPTION OF 3877 – 2.5 V, DUAL 5-BIT, 2-PORT, DDR FET SWITCH
standard by JEDEC Solid State Technology Association, 11/01/2001
JEDEC JESD55
STANDARD FOR DESCRIPTION OF LOW-VOLTAGE TTL-COMPATIBLE BiCMOS LOGIC DEVICES
standard by JEDEC Solid State Technology Association, 05/01/1996
JEDEC JESD88E
JEDEC Dictionary of Terms for Solid-State Technology, Sixth Edition
standard by JEDEC Solid State Technology Association, 06/01/2013
JEDEC JS 9702
IPC/JEDEC-9702: MONOTONIC BEND CHARACTERIZATION OF BOARD-LEVEL INTERCONNECTS (IPC/JEDEC-9702)
standard by JEDEC Solid State Technology Association, 06/01/2004
JEDEC JESD75-4
BALL GRID ARRAY PINOUT FOR 1-, 2-, AND 3-BIT LOGIC FUNCTIONS
standard by JEDEC Solid State Technology Association, 03/01/2004
JEDEC JESD9B
Inspection Criteria for Microelectronic Packages and Covers
standard by JEDEC Solid State Technology Association, 05/01/2011
JEDEC JESD79-3-2
Addendum No. 2 to JESD79-3 – 1.35 V DDR3L-800, DDR3L-1066, DDR3L-1333, and DDR3L-1600
Amendment by JEDEC Solid State Technology Association, 10/01/2011