Half Price Standard Code

ADDENDUM No. 7 to JESD8 – 1.8 V + -0.15 V (NORMAL RANGE), AND 1.2 V – 1.95 V (WIDE RANGE) POWER SUPPLY VOLTAGE AND INTERFACE STANDARD FOR NONTERMINATED DIGITAL INTEGRATED CIRCUIT
standard by JEDEC Solid State Technology Association, 06/01/2006

ADDENDUM No. 6 to JESD8 – HIGH SPEED TRANSCEIVER LOGIC (HSTL)- A 1.5 V OUTPUT BUFFER SUPPLY VOLTAGE BASED INTERFACE STANDARD FOR DIGITAL INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 08/01/1995

STRESS-TEST-DRIVEN QUALIFICATION OF INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 09/01/2017

Lead Integrity
standard by JEDEC Solid State Technology Association, 07/01/2011

IPC/JEDEC-9704: Printed Wiring Board (PWB) Strain Gage Test Guideline
standard by JEDEC Solid State Technology Association, 06/01/2005

MEASUREMENT AND REPORTING OF ALPHA PARTICLE AND TERRESTRIAL COSMIC RAY INDUCED SOFT ERRORS IN SEMICONDUCTOR DEVICES
standard by JEDEC Solid State Technology Association, 10/01/2006

PROCUREMENT STANDARD FOR KNOWN GOOD DIE (KGD)
standard by JEDEC Solid State Technology Association, 09/01/2005

NAND Flash Interface Interoperability
standard by JEDEC Solid State Technology Association, 10/01/2012

EMBEDDED MULTIMEDIACARD (e*MMC) PRODUCT STANDARD, HIGH CAPACITY
standard by JEDEC Solid State Technology Association, 07/01/2007

GENERAL REQUIREMENTS FOR DISTRIBUTORS OF COMMERCIAL AND MILITARY SEMICONDUCTOR DEVICES
standard by JEDEC Solid State Technology Association, 09/01/2012