Half Price Standard Code

Byte Addressable Energy Backed Interface
standard by JEDEC Solid State Technology Association, 09/01/2019

TEST METHOD FOR THE MEASUREMENT OF MOISTURE DIFFUSIVITY AND WATER SOLUBILITY IN ORGANIC MATERIALS USED IN INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 01/01/2008

EMBEDDED MULTIMEDIACARD(e*MMC) e*MMC/CARD PRODUCT STANDARD, HIGH CAPACITY, including Reliable Write, Boot, Sleep Modes, Dual Data Rate, Multiple Partitions Supports, Security Enhancement, Background Operation and High Priority Interrupt (MMCA, 4.41)
standard by JEDEC Solid State Technology Association, 03/01/2010

Component Quality Problem Analysis and Corrective Action Requirements (Including Administrative Quality Problems)
standard by JEDEC Solid State Technology Association, 06/01/2012

THERMAL TEST CHIP GUIDELINE (WIRE BOND TYPE CHIP)
standard by JEDEC Solid State Technology Association, 02/01/1997

DIGITAL BIPOLAR LOGIC PINOUTS FOR CHIP CARRIERS
standard by JEDEC Solid State Technology Association, 12/01/1982

ADDENDUM No. 2 to JESD8 – STANDARD FOR OPERATING VOLTAGES AND INTERFACE LEVELS FOR LOW VOLTAGE EMITTER-COUPLED LOGIC (ECL) INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 03/01/1993

Universal Flash Storage (UFS)
standard by JEDEC Solid State Technology Association, 03/01/2016

Low Power Double Data Rate 3 SDRAM (LPDDR3)
standard by JEDEC Solid State Technology Association, 05/01/2012

STRESS-TEST-DRIVEN QUALIFICATION OF INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 08/01/2017